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G. Edward Suh

Nvidia (United Kingdom) · GB
Area of research
Hardware and Architecture · Artificial Intelligence
Research interest
Research interests include Security and Verification in Computing, Parallel Computing and Optimization Techniques, Physical Unclonable Functions (PUFs) and Hardware Security, and Advanced Malware Detection Techniques.
h-index
43
citations
11,984
works
167
NIH funding
primary concept
email

Recent publications

GPU-based Private Information Retrieval for On-Device Machine Learning Inference
2024cited by 10position: lastdoi
GuardNN
Proceedings of the 59th ACM/IEEE Design Automation Conference 2022cited by 26position: lastdoi
Sinan: ML-based and QoS-aware resource management for cloud microservices
2021cited by 189position: middledoi
Wireless Charging Power Side-Channel Attacks
2021cited by 40position: lastdoi
TWiCe
2019cited by 87position: middledoi
Channel Gating Neural Networks
Neural Information Processing Systems 2019cited by 62position: last
FPGA-Based Remote Power Side-Channel Attacks
2018cited by 296position: lastdoi
Reverse engineering convolutional neural networks through side-channel information leaks
2018cited by 152position: lastdoi
Reverse Engineering Convolutional Neural Networks Through Side-channel Information Leaks
2018 55th ACM/ESDA/IEEE Design Automation Conference (DAC) 2018cited by 143position: lastdoi
HyperFlow
2018cited by 50position: lastdoi
SecDCP
2016cited by 97position: lastdoi
A Hardware Design Language for Timing-Sensitive Information-Flow Security
2015cited by 141position: middledoi
A Hardware Design Language for Timing-Sensitive Information-Flow Security
ACM SIGPLAN Notices 2015cited by 83position: middledoi
AEGIS
2014cited by 440position: firstdoi
Analytical cache models with applications to cache partitioning
2014cited by 121position: firstdoi
Timing channel protection for a shared memory controller
2014cited by 103position: lastdoi
Flash Memory for Ubiquitous Hardware Security Functions: True Random Number Generation and Device Fingerprints
2012cited by 124position: middledoi
Efficient Timing Channel Protection for On-Chip Networks
2012cited by 116position: lastdoi

Grants

No grants ingested yet.

Frequent collaborators

Weizhe Hua · Cornell University5 papers (2018–2022)Zhiru Zhang · Cornell University4 papers (2018–2022)Andrew C. Myers · Cornell University4 papers (2015–2018)Andrew Ferraiuolo · Google (United Kingdom)3 papers (2014–2018)Yao Wang · Kunming Medical University3 papers (2014–2016)Danfeng Zhang · Zhangzhou Normal University3 papers (2015–2016)Mark Zhao · Stanford University2 papers (2018–2018)Srinivas Devadas · Massachusetts Institute of Technology2 papers (2014–2014) · 1 papers (2024–2024) · 1 papers (2019–2019) · 1 papers (2019–2019)Udit Gupta · Cornell University1 papers (2024–2024)Kiwan Maeng · Pennsylvania State University1 papers (2024–2024)Alexander S. La Cour · Princeton University1 papers (2021–2021)Zhuangzhuang Zhou · Shenzhen University1 papers (2021–2021)Maximilian Lam · University of California, Berkeley1 papers (2024–2024)Christopher De · Cornell University1 papers (2019–2019) · 1 papers (2024–2024)Greg Malysa · Cornell University1 papers (2012–2012)Dwaine Clarke · Massachusetts Institute of Technology1 papers (2014–2014)