Area of research
Electrical and Electronic Engineering · Biomedical Engineering
Research interest
Research interests include Radio Frequency Integrated Circuit Design, Advancements in PLL and VCO Technologies, Analog and Mixed-Signal Circuit Design, and Microwave Engineering and Waveguides.
On-Chip $V_{\text{th}}$ Extraction and Control Circuits for Wide Temperature Range Operation Electronics
An Experimental Comparison of Thermal Noise Models of BSIM-CMG in 5-nm FinFETs
Performance and Compact Modeling of Transistors for Wide Temperature Range Electronics
A 10-bit 100kS/s SAR ADC With a Monotonic Capacitor Switching Procedure for Single-Ended Inputs in 22nm CMOS FDSOI
A 2.4-GHz Multiphase Inductorless PLL With Coupled-Ring Oscillators and Time-Amplifying Phase-Frequency Detector for Low Phase Noise and Robust Locking Performances
Characterization and Modeling of Non-Conducting RF Hot Carrier Stress in FinFETs
A 12-Bit 260-MS/s Pipelined-SAR ADC With Ring-TDC-Based Fine Quantizer for Automatic Cross-Domain Scale Alignment
Nonconducting RF and DC Hot Carrier Stresses in 14/16-nm FinFETs for RF Power Amplifiers
Highlights From CICC 2022 [Conference Reports]
A 0.97mW 260MS/s 12b Pipelined-SAR ADC with Ring-TDC-Based Fine Quantizer for PVT Robust Automatic Cross-Domain Scale Alignment
Impact of non-Conducting RF and DC Hot Carrier Stresses on FinFET Reliability for RF Power Amplifiers
A dual-residue pipelined SAR ADC using only zero-crossing signals
An mm-Wave Synthesizer With Robust Locking Reference-Sampling PLL and Wide-Range Injection-Locked VCO
A Fractional-<i>N</i> Reference Sampling PLL With Linear Sampler and CDAC Based Fractional Spur Cancellation
Sub-Sampling Direct RF-to-Digital Converter With 1024-APSK Modulation for High Throughput Polar Receiver
A 7.7~10.3GHz 5.2mW -247.3dB-FOM Fractional-N Reference Sampling PLL with 2nd Order CDAC Based Fractional Spur Cancellation In 45nm CMOS
Time-to-digital converters
A 280MS/s 12b SAR-Assisted Hybrid ADC with Time Domain Sub-Range Quantizer in 45nm CMOS
An 8-bit 80-MS/s Fully Self-Timed SAR ADC with 3/2 Interleaved Comparators and High-Order PVT Stabilized HBT Bandgap Reference
An mm-Wave Synthesizer with Low In-Band Noise and Robust Locking Reference-Sampling PLL
A 3.8 mW Sub-Sampling Direct RF-to-Digital Converter for Polar Receiver Achieving 1.94 Gb/s Data Rate with 1024-APSK Modulation
A 2.4-GHz 16-Phase Sub-Sampling Fractional-N PLL With Robust Soft Loop Switching
A Reconfigurable Vernier Time-to-Digital Converter With 2-D Spiral Comparator Array and Second-Order $\Delta \Sigma$ Linearization
A bidirectional lens-free digital-bits-in/-out 0.57mm<sup>2</sup> terahertz nano-radio in CMOS with 49.3mW Peak power consumption supporting 50cm Internet-of-Things communication
A full-duplex transceiver front-end RFIC with code-domain spread spectrum modulation for Tx self-interference cancellation and in-band jammer rejection
A Multi-Phase Coupled Oscillator Using Inductive Resonant Coupling and Modified Dual-Tank Techniques
A Low Phase Noise Ring Oscillator with Miller Capacitance Cancellation
A 1.8 GHz–2.4 GHz SAW-Less Reconfigurable Receiver Frontend RFIC in 65nm CMOS RF SOI
An 802.11a/b/g/n Digital Fractional- $N$ PLL With Automatic TDC Linearity Calibration for Spur Cancellation