Area of research
Electrical and Electronic Engineering
Research interest
Research interests include Semiconductor materials and devices, Advancements in Semiconductor Devices and Circuit Design, Advanced Memory and Neural Computing, and Ferroelectric and Negative Capacitance Devices.
OpenFPGA-NoC: Automated Fabric and Bitstream Generation for NoC-based FPGAs
ARIANNA: An Automatic Design Flow for Fabric Customization and eFPGA Redaction
Changing Idling Behavior Through Dynamic Idle Detection and Air Quality Messaging
Three-Independent-Gate Transistors: The Swiss Army Knife of Devices [Special Section on 2025 IEEE Kirchhoff Award]
A MAJestic Synthesis Review [Special Section on 2025 IEEE Kirchhoff Award]
FlowTune: End-to-End Automatic Logic Optimization Exploration via Domain-Specific Multiarmed Bandit
CoMeFa: Deploying Compute-in-Memory on FPGAs for Deep Learning Acceleration
Not All Fabrics Are Created Equal: Exploring eFPGA Parameters for IP Redaction
Low Latency SEU Detection in FPGA CRAM With In-Memory ECC Checking
Low Latency SEU Detection in FPGA CRAM With In-Memory ECC Checking
CoMeFa: Deploying Compute-in-Memory on FPGAs for Deep Learning Acceleration
Not All Fabrics Are Created Equal: Exploring eFPGA Parameters for IP Redaction
Smart-Redundancy With In Memory ECC Checking: Low-Power SEE-Resistant FPGA Architectures
A Scalable and Area-Efficient Configuration Circuitry for Semi-Custom FPGA Design
An Open-source Three-Independent-Gate FET Standard Cell Library for Mixed Logic Synthesis
A Two-Level Approximate Logic Synthesis Combining Cube Insertion and Removal
Programmable Local Clock SET Filtering for SEE-Resistant FPGA
Exploring eFPGA-based Redaction for IP Protection
SLAP: A Supervised Learning Approach for Priority Cuts Technology Mapping
A TCAD Simulation Study of Three-Independent-Gate Field-Effect Transistors at the 10-nm Node
A TCAD Simulation Study of Three-Independent-Gate Field-Effect Transistors at the 10-nm Node
Parasitic Capacitance Analysis of Three-Independent-Gate Field-Effect Transistors
Parasitic Capacitance Analysis of Three-Independent-Gate Field-Effect Transistors
A Multiply-and-Accumulate Array for Machine Learning Applications Based on a 3D Nanofabric Flow
Guest Editors’ Introduction: The Resurgence of Open-Source EDA Technology
SpinalFlow: An Architecture and Dataflow Tailored for Spiking Neural Networks
OpenFPGA: An Open-Source Framework for Agile Prototyping Customizable FPGAs