Area of research
Computer Networks and Communications · Hardware and Architecture
Research interest
Research interests include Computer science, Scalability, Router, Network on a chip, Cache, and Cache pollution.
REVAMP: a systematic framework for heterogeneous CGRA realization
SCORPIO: A 36-core research chip demonstrating snoopy coherence on a scalable mesh NoC with in-network ordering
Single-cycle collective communication over a shared network fabric
MobiStreams: A Reliable Distributed Stream Processing System for Mobile Devices
Locality-oblivious cache organization leveraging single-cycle multi-hop NoCs
Locality-oblivious cache organization leveraging single-cycle multi-hop NoCs
Locality-oblivious cache organization leveraging single-cycle multi-hop NoCs
Breaking the on-chip latency barrier using SMART
SMART: A Single-Cycle Reconfigurable NoC for SoC Applications
SMART: a single-cycle reconfigurable NoC for SoC applications
Modeling reaction time within a traffic simulation model
DSENT - A Tool Connecting Emerging Photonics with Electronics for Opto-Electronic Networks-on-Chip Modeling
Low cost crowd counting using audio tones
Approaching the theoretical limits of a mesh NoC with a 16-node chip prototype in 45nm SOI